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Why does this diagram on CMOS switching show the ground voltage rising?
(programming.dev)
This is from a section on why decoupling capacitors should be attached to CMOS chips. It shows current spikes during transitions. Which then because of the inductance of traces connecting power to the chip, will cause the power rail voltage to droop.
But why is the ground voltage also shown to rise? What does it even mean for ground voltage to rise when ground is what voltage is measured against?
The voltage in the chart represents the "ground" available inside the chip, measured against some better and more stable ground available elsewhere.
Oh that makes sense, thanks :)